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Designing digital systems using Cartesian Genetic Programming and VHDL (2018)
Book Chapter
Henson, B., Walker, J. A., Trefzer, M. A., & Tyrrell, A. M. (2018). Designing digital systems using Cartesian Genetic Programming and VHDL. In S. Stepney, & A. Adamatzky (Eds.), Inspired by Nature: Essays Presented to Julian F. Miller on the Occasion of his 60th Birthday, 57-86. Springer Verlag. doi:10.1007/978-3-319-67997-6_3

Hybrid Bridge-Based Memetic Algorithms for Finding Bottlenecks in Complex Networks (2018)
Journal Article
Chalupa, D., Hawick, K., & Walker, J. (2018). Hybrid Bridge-Based Memetic Algorithms for Finding Bottlenecks in Complex Networks. Big Data Research, 14, 68-80. https://doi.org/10.1016/j.bdr.2018.04.001

We propose a memetic approach to find bottlenecks in complex networks based on searching for a graph partitioning with minimum conductance. Finding the optimum of this problem, also known in statistical mechanics as the Cheeger constant, is one of th... Read More about Hybrid Bridge-Based Memetic Algorithms for Finding Bottlenecks in Complex Networks.

Hierarchical strategies for efficient fault recovery on the reconfigurable PAnDA device (2017)
Journal Article
Trefzer, M. A., Lawson, D. M. R., Bale, S. J., Walker, J. A., Tyrrell, A. M., Lawson, D. M., …Tyrrell, A. (2017). Hierarchical strategies for efficient fault recovery on the reconfigurable PAnDA device. IEEE Transactions on Computers, 66(6), 930-945. https://doi.org/10.1109/TC.2016.2632722

A novel hierarchical fault-tolerance methodology for reconfigurable devices is presented. A bespoke multi-reconfigurable FPGA architecture, the programmable analogue and digital array (PAnDA), is introduced allowing fine-grained reconfiguration beyon... Read More about Hierarchical strategies for efficient fault recovery on the reconfigurable PAnDA device.


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