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Passive memristor synaptic circuits with multiple timing dependent plasticity mechanisms

Šuch, O.; Klimo, M.; Kemp, N. T.; Škvarek, O.

Authors

O. Šuch

M. Klimo

O. Škvarek



Abstract

Adaptation of synaptic strength is central to memory and learning in biological systems, enabling important high-level processes such as the ability of animals to respond to a changing environment. Memristor devices are a promising new, nanoscale technology that emulates the function of synapses and can therefore be used to represent synaptic elements in analog artificial neural networks. The main mechanism to carry out unsupervised adaptation of weights in memristive synapses currently involves artificial spiking neural network designs relying on spike-timing dependent plasticity (STDP). We present and analyze a new memristive circuit that in addition to STDP learning rules also implements competitive adjustment based on relative timing of presynaptic inputs. The cooperative effect of multiple learning rules in the new circuit may ameliorate the problem of erasure of synaptic weights.

Journal Article Type Article
Publication Date Nov 1, 2018
Journal AEU - International Journal of Electronics and Communications
Print ISSN 1434-8411
Electronic ISSN 1618-0399
Publisher Elsevier
Peer Reviewed Peer Reviewed
Volume 96
Pages 252-259
APA6 Citation Šuch, O., Klimo, M., Kemp, N. T., & Škvarek, O. (2018). Passive memristor synaptic circuits with multiple timing dependent plasticity mechanisms. AEÜ - International Journal of Electronics and Communications / Archiv für Elektronik und Übertragungstechnik, 96, 252-259. https://doi.org/10.1016/j.aeue.2018.09.025
DOI https://doi.org/10.1016/j.aeue.2018.09.025
Keywords Electrical and Electronic Engineering
Publisher URL https://www.sciencedirect.com/science/article/pii/S1434841118312482?via%3Dihub

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Copyright Statement
© 2019. This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0/



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